At the 2026 IC Innovation Conference in Wuxi, SJ Semiconductor announced a major upgrade to its SmartPoser®‑Si silicon interposer 2.5D advanced packaging platform – expanding the interposer size to 3.3x reticle. This breakthrough positions the company for large‑scale multi‑chiplet heterogeneous integration mass production, a critical capability for next‑gen AI and HPC processors.

The platform, already in production since 2022, now overcomes key challenges of large‑format interposers: warpage control, multi‑chip co‑bonding precision, and CTE mismatch between dissimilar materials. Leveraging high‑density TSV and ultra‑fine line‑space interconnect, SJ Semiconductor can now integrate multiple logic and HBM dies on a single 3.3x reticle interposer – enabling sub‑micron interconnection between compute and memory chiplets.

The result: high bandwidth, low power, and low latency connections that directly boost system‑level compute density and data transfer efficiency – essential for AI accelerators and high‑performance computing workloads.

SJ Semiconductor is a leading domestic player in 2.5D/3D heterogeneous integration. This expansion further rounds out its SmartPoser® product line, positioning the company as a key enabler for China's high‑end chip packaging ecosystem. Future R&D will continue to focus on next‑generation advanced packaging technologies, driving the industry toward higher integration and performance.

ICgoodFind Takeaway:
3.3x reticle interposer isn't just a spec bump – it's a capacity signal. SJ Semiconductor is now tooled to handle the largest AI chiplets, a critical step in China's advanced packaging roadmap.